Acceleration of Image Processing with SHA-3 (Keccak) Algorithm
using FPGA

Acceleration of Image Processing with SHA-3 (Keccak) Algorithm using FPGA by Argyrios Sideris* , Theodora Sanida , Dimitris Tsiktsiris , Minas Dasygenis  Department of Electrical & Computer Engineering, University of Western Macedonia, Kozani, 50131, Greece * Author to whom correspondence should be addressed. Journal of Engineering Research and Sciences, Volume 1, Issue 7, Page # …